Lattice Semiconductor - Evaluation board enables rapid prototyping of ECP5 FPGA designs (LFE5UM-45F-VERSA-EVN) | Heisener Electronics
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Lattice Semiconductor - Evaluation board enables rapid prototyping of ECP5 FPGA designs (LFE5UM-45F-VERSA-EVN)

Post Date: 2015-09-23 , Lattice Semiconductor Corporation
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ECP5 Versa Evaluation Board from Lattice Semiconductor. The evaluation board is part of the ECP5 Versa Development Kit (LFE5-85E-PB-EVN), enabling developers to test the functionality of Lattice Semiconductor's ECP5 Field Programmable Gate Array (FPGA), including PCI Express, Gigabit Ethernet, DDR3 and DDR3. Universal SERDES performance. The evaluation board helps designers quickly prototype and test ECP5 designs and is optimized to provide high-performance features in the ECP5 FPGA device family, including enhanced DSP architecture, high-speed SERDES, and high-speed source-synchronous interfaces. . The evaluation board was developed using a half-length PCI Express form factor to demonstrate the PCI Express x1 interconnect. The development board has a USB-B connection for UART and device programming, and is equipped with 128M serial SPI flash memory, 1GByte DDR3 memory component (64Mbyte x 16), two RJ45 jacks, and can connect to 10/100/1000 Ethernet The interface is interconnected with RGMII and an extended mezzanine for prototyping. Other design features of the evaluation board include switches, LEDs and displays for demonstration purposes, convenient power measurement, a 14-segment alphanumeric display, and an on-board reference clock source. The ECP5 device family covers look-up table (LUT) capacity, can hold 84K logic units, and supports up to 365 user I / Os. FPGAs are suitable for a variety of high-volume, high-speed, and low-cost digital signal processing (DSP) applications. Typical programmable logic functions used in these applications are finite impulse response (FIR) filters, fast Fourier transform (FFT) functions, correlators, Reed-Solomon / turbo / convolution encoders and decoders. The pre-designed source-synchronous logic implemented in the ECP5 device family also supports multiple interface standards, including DDR2 / 3, LPDDR2 / 3, XGMII, and 7: 1 LVDS.